POOL32A 000000 |
rt |
rs |
rd |
SUBU.QB 01011001101 |
POOL32A 000000 |
rt |
rs |
rd |
SUBU_S.QB 11011001101 |
6 |
5 |
5 |
5 |
11 |
SPECIAL3 011111 |
rs |
rt |
rd |
SUBU.QB 00001 |
ADDU.QB 010000 |
SPECIAL3 011111 |
rs |
rt |
rd |
SUBU_S.QB 00101 |
ADDU.QB 010000 |
6 |
5 |
5 |
5 |
5 |
6 |
SUBU[_S].QB |
Subtract Unsigned Quad Byte Vector | |
SUBU.QB rd, rs, rt |
microMIPSDSP |
Subtract Unsigned Quad Byte Vector |
SUBU_S.QB rd, rs, rt |
microMIPSDSP |
Subtract Unsigned Quad Byte Vector |
Subtract Unsigned Quad Byte Vector
Element-wise subtraction of one vector of unsigned byte values from another to produce a vector of unsigned byte results, with optional saturation.
rd = sign_extend(sat8(rs31..24 - rt31..24)) || sat8(rs23..16 - rt23..16) || sat8(rs15..8 - rt15..8) || sat8(rs7..0 - rt7..0)
The four right-most byte elements in rt are subtracted from the corresponding byte elements in register rs.
For the non-saturating version of the instruction, the result modulo 256 is written into the corresponding position in register rd.
For the saturating version of the instruction the subtraction is performed using unsigned saturating arithmetic. If the subtraction results in underflow, the value is clamped to the smallest representable value (0 decimal, 0x00 hexadecimal) before being written to the destination register rd.
For each instruction, the sign of the left-most byte result is extended into the 32 most-significant bits of the destination register.
For each instruction, if any of the individual subtractions result in underflow or saturation, a 1 is written to bit 20 in the DSPControl register within the ouflag field.
No data-dependent exceptions are possible.
The operands must be values in the specified format. If they are not, the results are UNPREDICTABLE and the values of the operand vectors become UNPREDICTABLE.
SUBU.QB: tempD7..0 = subtractU8( GPR[rs]31..24 , GPR[rt]31..24 ) tempC7..0 = subtractU8( GPR[rs]23..16 , GPR[rt]23..16 ) tempB7..0 = subtractU8( GPR[rs]15..8 , GPR[rt]15..8 ) tempA7..0 = subtractU8( GPR[rs]7..0 , GPR[rt]7..0 ) GPR[rd]63..0 = (tempD7)32 || tempD7..0 || tempC7..0 || tempB7..0 || tempA7..0 SUBU_S.QB: tempD7..0 = satU8Subtract( GPR[rs]31..24 , GPR[rt]31..24 ) tempC7..0 = satU8Subtract( GPR[rs]23..16 , GPR[rt]23..16 ) tempB7..0 = satU8Subtract( GPR[rs]15..8 , GPR[rt]15..8 ) tempA7..0 = satU8Subtract( GPR[rs]7..0 , GPR[rt]7..0 ) GPR[rd]63..0 = (tempD7)32 || tempD7..0 || tempC7..0 || tempB7..0 || tempA7..0 function subtractU8( a7..0, b7..0 ) temp8..0 = ( 0 || a7..0 ) - ( 0 || b7..0 ) if ( temp8 = 1 ) then DSPControlouflag:20 = 1 endif return temp7..0 endfunction subtractU8 function satU8Subtract( a7..0, b7..0 ) temp8..0 = ( 0 || a7..0 ) - ( 0 || b7..0 ) if ( temp8 = 1 ) then temp7..0 = 0x00 DSPControlouflag:20 = 1 endif return temp7..0 endfunction satU8Subtract
Reserved Instruction, DSP Disabled